Improper conditions check in some Intel(R) Xeon(R) processor memory controller configurations when using Intel(R) SGX may allow a privileged
Improper conditions check in some Intel(R) Xeon(R) processor memory controller configurations when using Intel(R) SGX may allow a privileged user to potentially enable escalation of privilege via local access.
- Published
- Nov 13, 2024
- Updated
- Jun 17, 2026
- EPSS
- 0.3% · 16th percentile
- CWE
- CWE-92
Sign in to follow · You’ll be notified if a followed record enters KEV, gets an exploit or is updated.
Report tools
Action score
35
Monitor
Low priority for now.
- CVSS
- 35 / 40 · 8.8 / 10
- CISA KEV
- 0 / 30 · Not listed
- EPSS
- 0 / 30 · 0.3%
CISA SSVC decision
- Exploitation
- none
- Automatable
- no
- Technical impact
- total
Vulnrichment: CISA's decision-tree inputs.
CNA vs NVD score
- NVD
- —
- CNA · intel
- 8.8
- NVD has not scored this yet; the score shown is the CNA’s.
CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:H/SI:H/SA:H
The score given by the assigning authority versus NVD’s independent score. A gap means the severity is contested.
Noroxi analysis
No Noroxi analysis for this record yet
We don't hand-write analysis for the hundreds of thousands of vulnerabilities in the database; that wouldn't be honest. For notable, high-impact vulnerabilities our team writes the mechanism, detection and remediation steps.
We use this product, ask for helpAffected systems
| Vendor | Product | CPE |
|---|---|---|
| intel | 3rd generation intel xeon scalable processor family | cpe:2.3:h:intel:3rd_generation_intel_xeon_scalable_processor_family |
| intel | 4th generation intel xeon processor scalable family | cpe:2.3:h:intel:4th_generation_intel_xeon_processor_scalable_family |
| intel | 5th generation intel xeon processor scalable family | cpe:2.3:h:intel:5th_generation_intel_xeon_processor_scalable_family |
| intel | xeon d processor | cpe:2.3:h:intel:xeon_d_processor |
Versions reported by the vendor
Affected version ranges reported by the assigning authority (intel). Independent of NVD's CPE analysis and usually ahead of it.
n/a Intel(R) Xeon(R) processor memory controller configurations when using Intel(R) SGX
- See referencesaffected
Package-level exposure
OSV and GitHub Advisory data: ecosystem, package and range. SBOM matching uses this table.
| Ecosystem | Package | Affected range | Fix |
|---|---|---|---|
| Alpine:v3.17 | intel-ucode | before 20241112-r0 | 20241112-r0 |
| Debian:11 | intel-microcode | before 3.20241112.1~deb11u1 | 3.20241112.1~deb11u1 |
| Debian:12 | intel-microcode | before 3.20241112.1~deb12u1 | 3.20241112.1~deb12u1 |
| Debian:13 | intel-microcode | before 3.20241112.1 | 3.20241112.1 |
| openSUSE:Tumbleweed | ucode-intel | before 20241112-1.1 | 20241112-1.1 |
| SUSE:Linux Enterprise Micro 5.3 | ucode-intel | before 20241112-150200.50.1 | 20241112-150200.50.1 |
| SUSE:Linux Enterprise Micro 5.3 | ucode-intel | before 20241112-150200.50.1 | 20241112-150200.50.1 |
| SUSE:Linux Enterprise Server 11 SP4 LTSS EXTREME CORE | microcode_ctl | before 1.17-102.83.81.1 | 1.17-102.83.81.1 |
| SUSE:Linux Enterprise Server 12 SP5-LTSS | ucode-intel | before 20241112-146.1 | 20241112-146.1 |
| SUSE:Linux Micro 6.0 | ucode-intel | before 20241112-1.1 | 20241112-1.1 |
| SUSE:Linux Micro 6.1 | ucode-intel | before 20250211-slfo.1.1_2.1 | 20250211-slfo.1.1_2.1 |
Remediation
Which version to upgrade to
Fix versions compiled from the vendor, package registries and Microsoft. Verify the vendor's note before upgrading.
| Product / package | Fixed version | Source |
|---|---|---|
| alpine:intel-ucode | 20241112-r0 · Alpine:v3.17 | Package registry (OSV) |
| debian:intel-microcode | 3.20241112.1~deb12u1 · Debian:12 | Package registry (OSV) |
| opensuse:ucode-intel | 20241112-150200.50.1 · openSUSE:Leap Micro 5.5 | Package registry (OSV) |
| suse:microcode_ctl | 1.17-102.83.81.1 · SUSE:Linux Enterprise Server 11 SP4 LTSS EXTREME CORE | Package registry (OSV) |
| suse:ucode-intel | 20241112-146.1 · SUSE:Linux Enterprise Server 12 SP5-LTSS | Package registry (OSV) |
| suse:ucode-intel | 20241112-150200.50.1 · SUSE:Linux Enterprise Micro 5.3 | Package registry (OSV) |
Exploit status
No known public exploit
No public exploit has been observed yet. That doesn't mean you're safe, only that the bar is a little higher.
Research context
For pentesters and researchers: attack profile, score disagreement, timeline, patch commits, credits, variant and chain candidates, bug bounty scope. All derived from existing data; no exploit code.
Timeline
From publication to today: proof of concept, Metasploit module, CISA KEV and fix record. Dates are as reported by the sources.
No dated events beyond publication.
FIRST EPSS daily score; only changes of 0.01 or more are recorded (step chart).
Patch and commit links
Commit, PR and diff links among the references. A starting point for patch-diffing and variant hunting; fixes, not exploits.
No commit or PR link among the references.
Credits
All researchersFinders, reporters and analysts named in the CNA record. Click a name for that researcher’s other records.
No credits in the CNA record.
Variant candidates
Same product, same weakness class, within 18 months. If the patch missed the root cause, the sibling bug is here.
No nightly-computed relations.
Chain candidates
An authentication bypass and a privilege-requiring bug in the same product, published close together: combined they may become an unauthenticated path.
—
Bug bounty scope
The product’s vendor appears in a public program. Matched by name; verify the scope text in the program.
Technical details
Attack conditions
- Someone with local access to the system can trigger it.
- A low-privileged account is enough.
- No user action is required.
- No special conditions are required; it is repeatable.
If successful
- Confidentiality
- Integrity
- Availability
- Attack vector
- Local
- Attack complexity
- Low
- Privileges required
- Low
- User interaction
- None
- Scope
- X
Weakness class (CWE)
CWE-92 · DEPRECATED: Improper Sanitization of Custom Special CharactersCVSS vector
CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:H/SI:H/SA:H/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
nvd-secondary
Attack context
MITRE CAPEC attack patterns and ATT&CK techniques for this weakness class (CWE). A starting point for detection rules and threat hunting.
MITRE has no CAPEC/ATT&CK mapping for this CWE.
Change log
- Fix✗ → ✓
For records you follow, these changes also arrive as notifications. →
References
- www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01079.html
- lists.debian.org/debian-lts-announce/2024/12/msg00024.html
Vendor advisories and official records. Exploit/PoC links are deliberately left out.